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Data Sheet No. PD60161-N
IR2108(4) (S)
Features
HALF-BRIDGE DRIVER
Packages
* Floating channel designed for bootstrap operation * * * * * * * * * *
Fully operational to +600V 14-Lead SOIC Tolerant to negative transient voltage 8-Lead SOIC IR21084S IR2108S dV/dt immune Gate drive supply range from 10 to 20V Undervoltage lockout for both channels 14-Lead PDIP 3.3V, 5V and 15V input logic compatible IR21084 Cross-conduction prevention logic Matched propagation delay for both channels 8-Lead PDIP IR2108 High side output in phase with HIN input Low side output out of phase with LIN input Logic and power ground +/- 5V offset. Internal 540ns dead-time, and 2106/2301//2108//2109/2302 Feature Comparison programmable up to 5us with one Crossexternal RDT resistor (IR21084) Input conduction Lower di/dt gate driver for better Part Dead-Time Ground Pins Ton/Toff logic prevention noise immunity logic
2106/2301 HIN/LIN 21064 2108 HIN/LIN 21084 2109/2302 IN/SD 21094 no none COM VSS/COM COM VSS/COM COM VSS/COM 220/200
Description
Internal 540ns The IR2108(4)(S) are high voltage, yes 220/200 s Programmable 0.54~5 high speed power MOSFET and IGBT Internal 540ns 750/200 yes drivers with dependent high and low s Programmable 0.54~5 side referenced output channels. Proprietary HVIC and latch immune CMOS technologies enable ruggedized monolithic construction. The logic input is compatible with standard CMOS or LSTTL output, down to 3.3V logic. The output drivers feature a high pulse current buffer stage designed for minimum driver cross-conduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high side configuration which operates up to 600 volts.
Typical Connection
up to 600V VCC
VCC
HIN LIN
VB HO VS LO
TO LOAD
HIN LIN COM
up to 600V
IR2108
VCC HIN LIN VCC HIN LIN DT V SS RDT VSS
HO VB VS
IR21084
TO LOAD
(Refer to Lead Assignments for correct pin configuration). This/These diagram(s) show electrical connections only. Please refer to our Application Notes and DesignTips for proper circuit board layout.
COM LO
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1
IR2108(4) (S)
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions.
Symbol
VB VS VHO VCC VLO DT VIN VSS dVS/dt PD
Definition
High side floating absolute voltage High side floating supply offset voltage High side floating output voltage Low side and logic fixed supply voltage Low side output voltage Programmable dead-time pin voltage (IR21084 only) Logic input voltage (HIN & LIN) Logic ground (IR21084 only) Allowable offset supply voltage transient Package power dissipation @ TA +25C (8 lead PDIP) (8 lead SOIC) (14 lead PDIP) (14 lead SOIC)
Min.
-0.3 VB - 25 VS - 0.3 -0.3 -0.3 VSS - 0.3 VSS - 0.3 VCC - 25 -- -- -- -- -- -- -- -- -- -- -50 --
Max.
625 VB + 0.3 VB + 0.3 25 VCC + 0.3 VCC + 0.3 VCC + 0.3 VCC + 0.3 50 1.0 0.625 1.6 1.0 125 200 75 120 150 150 300
Units
V
V/ns
W
RthJA
Thermal resistance, junction to ambient
(8 lead PDIP) (8 lead SOIC) (14 lead PDIP) (14 lead SOIC)
C/W
TJ TS TL
Junction temperature Storage temperature Lead temperature (soldering, 10 seconds)
C
Recommended Operating Conditions
The Input/Output logic timing diagram is shown in figure 1. For proper operation the device should be used within the recommended conditions. The VS and VSS offset rating are tested with all supplies biased at 15V differential.
Symbol
VB VS VHO VCC VLO VIN DT VSS
Definition
High side floating supply absolute voltage High side floating supply offset voltage High side floating output voltage Low side and logic fixed supply voltage Low side output voltage Logic input voltage IR2108 IR21084 Programmable dead-time pin voltage (IR21084 only) Logic ground (IR21084 only)
Min.
VS + 10 Note 1 VS 10 0 COM VSS VSS -5
Max.
VS + 20 600 VB 20 VCC VCC VCC VCC 5
Units
V
C TA Ambient temperature -40 125 Note 1: Logic operational for VS of -5 to +600V. Logic state held for VS of -5V to -V BS. (Please refer to the Design Tip DT97-3 for more details).
2
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IR2108(4) (S)
Dynamic Electrical Characteristics
VBIAS (VCC, VBS) = 15V, VSS = COM, CL = 1000 pF, TA = 25C, DT = VSS unless otherwise specified.
Symbol
ton toff MT tr tf DT MDT
Definition
Turn-on propagation delay Turn-off propagation delay Delay matching | ton - toff Turn-on rise time Turn-off fall time Deadtime: LO turn-off to HO turn-on(DTLO-HO) & HO turn-off to LO turn-on (DTHO-LO) Deadtime matching = | DTLO-HO - DTHO-LO |
Min.
-- --
Typ.
220 200 0 150 50 540 5 0 0
Max. Units Test Conditions
300 280 30 220 80 680 6 60 600 usec nsec nsec VS = 0V VS = 0V RDT= 0 RDT = 200k (IR21084) RDT=0 RDT = 200k (IR21084) VS = 0V VS = 0V or 600V
|
-- -- -- 400 4 -- --
Static Electrical Characteristics
VBIAS (VCC, VBS ) = 15V, VSS = COM, DT= VSS and TA = 25C unless otherwise specified. The VIL, VIH and IIN parameters are referenced to VSS/COM and are applicable to the respective input leads: HIN and LIN. The VO, IO and Ron parameters are referenced to COM and are applicable to the respective output leads: HO and LO.
Symbol
VIH VIL VOH VOL ILK IQBS IQCC IIN+ IINVCCUV+ VBSUV+ VCCUVVBSUVVCCUVH VBSUVH IO+ IO-
Definition
Logic "1" input voltage for HIN & logic "0" for LIN Logic "0" input voltage for HIN & logic "1" for LIN High level output voltage, VBIAS - VO Low level output voltage, VO Offset supply leakage current Quiescent VBS supply current Quiescent VCC supply current Logic "1" input bias current Logic "0" input bias current VCC and VBS supply undervoltage positive going threshold VCC and VBS supply undervoltage negative going threshold Hysteresis Output high short circuit pulsed current Output low short circuit pulsed current
Min. Typ. Max. Units Test Conditions
2.9 -- -- -- -- 20 0.4 -- -- 8.0 7.4 0.3 120 250 -- -- 0.8 0.3 -- 60 1.0 5 1 8.9 8.2 0.7 200 350 -- 0.8 1.4 0.6 50 150 1.6 20 2 9.8 9.0 V -- -- -- mA VO = 0V, PW 10 s VO = 15V, PW 10 s A A mA V VCC = 10V to 20V VCC = 10V to 20V IO = 20 mA IO = 20 mA VB = VS = 600V VIN = 0V or 5V VIN = 0V or 5V RDT=0 HIN = 5V, LIN = 0V HIN = 0V, LIN = 5V
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IR2108(4) (S)
Functional Block Diagram
VB
2108
HV LEVEL SHIFTER
UV DETECT R PULSE FILTER R S Q
HO
HIN
VSS/COM LEVEL SHIFT
VS
PULSE GENERATOR
DT
DEADTIME & SHOOT-THROUGH PREVENTION
VCC
UV DETECT
+5V
LO
LIN
VSS/COM LEVEL SHIFT
DELAY
COM
VSS
VB
21084
HIN
VSS/COM LEVEL SHIFT HV LEVEL SHIFTER PULSE GENERATOR PULSE FILTER
UV DETECT R R S Q
HO
VS
DT
+5V
DEADTIME & SHOOT-THROUGH PREVENTION UV DETECT
VCC
LO
LIN
VSS/COM LEVEL SHIFT
DELAY
COM
VSS
4
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IR2108(4) (S)
Lead Definitions
Symbol Description
HIN Logic input for high side gate driver output (HO), in phase (referenced to COM for IR2108 and VSS for IR21084) Logic input for low side gate driver output (LO), out of phase (referenced to COM for IR2108 and VSS for IR21084) DT VSS VB HO VS VCC LO COM Programmable dead-time lead, referenced to VSS. (IR21084 only) Logic Ground (21084 only) High side floating supply High side gate driver output High side floating supply return Low side and logic fixed supply Low side gate driver output Low side return
LIN
Lead Assignments
1 2 3 4 VCC HIN LIN COM VB HO VS LO
8
7 6 5
1 2 3 4
VCC HIN LIN COM
VB HO VS LO
8
7 6 5
8 Lead PDIP
8 Lead SOIC
IR2108
IR2108S
1 2 3 4 5 6 7
VCC HIN LIN DT VSS COM LO VB HO VS
14
13 12 11 10 9 8
1 2 3 4 5 6 7
VCC HIN LIN DT VSS COM LO VB HO VS
14
13 12 11 10 9 8
14 Lead PDIP
14 Lead SOIC
IR21084
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IR21084S
5
IR2108(4) (S)
HIN
LIN
LIN
HO
50%
50%
LO
ton
tr 90%
toff 90%
tf
Figure 1. Input/Output Timing Diagram
LO
10%
10%
50%
50%
HIN
ton tr toff tf 90% 90% Figure 2. Switching Time Waveform Definitions
HIN LIN
50%
50%
HO
10%
10%
90%
HO LO
DT LO-HO
10% DT HO-LO
90%
10% MDT= DT LO-HO - DT
HO-LO
Figure 3. Deadtime Waveform Definitions
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IR2108(4) (S)
Case outlines
8-Lead PDIP
D A 5 B
F OOT PRINT 8X 0.72 [.028]
01-6014 01-3003 01 (MS-001AB)
DIM A b
INCHES MIN .0532 .013 .0075 .189 .1497 MAX .0688 .0098 .020 .0098 .1968 .1574
MILLIMETERS MIN 1.35 0.10 0.33 0.19 4.80 3.80 MAX 1.75 0.25 0.51 0.25 5.00 4.00
A1 .0040 c
6 E
8
7
6
5 H 0.25 [.010] A
6.46 [.255]
D E e e1 H K L
8X 1.78 [.070]
1
2
3
4
.050 BAS IC .025 BAS IC .2284 .0099 .016 0 .2440 .0196 .050 8
1.27 BAS IC 0.635 BAS IC 5.80 0.25 0.40 0 6.20 0.50 1.27 8
6X e e1 A C
3X 1.27 [.050]
y
K x 45 y 0.10 [.004]
8X b 0.25 [.010]
NOT ES:
A1 CAB
8X L 7
8X c
1. DIMENS IONING & T OLERANCING PE R ASME Y14.5M-1994. 2. CONT ROLLING DIMENSION: MILLIMET ER 3. DIMENS IONS ARE SHOWN IN MILLIME TE RS [INCHES]. 4. OUT LINE CONF ORMS T O JEDEC OUTLINE MS-012AA.
5 DIMENS ION DOES NOT INCLUDE MOLD PROT RUSIONS . MOLD PROT RUS IONS NOT TO EXCEED 0.15 [.006]. 6 DIMENS ION DOES NOT INCLUDE MOLD PROT RUSIONS . MOLD PROT RUS IONS NOT TO EXCEED 0.25 [.010]. 7 DIMENS ION IS T HE LENGT H OF LEAD FOR SOLDERING T O A SUBST RATE.
8-Lead SOIC
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01-6027 01-0021 11 (MS-012AA)
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IR2108(4) (S)
14-Lead PDIP
01-6010 01-3002 03 (MS-001AC)
14-Lead SOIC (narrow body)
01-6019 01-3063 00 (MS-012AB)
IR WORLD HEADQUARTERS: 233 Kansas Street, El Segundo, California 90245 Tel: (310) 252-7105 Data and specifications subject to change without notice. 2/25/2002
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